Wellcome

Bist based low transition test pattern generation for minimizing test power in VLSI circutts /

By: Praveen, JContributor(s): Shanmukha Swamy, M. N [guide]Material type: TextTextLanguage: English Description: xv, 179 p. ; 32 cmSubject(s): VLSI Testing | VLSI Circuits | Test Pattern Generator | Linear Feedback Shift RegisterDDC classification: 621 PRA Online resources: Click here to access online Dissertation note: Ph.D University of Mysore, Department of Studies in Electronics. 2016
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Item type Current library Call number Status Date due Barcode
Thesis Thesis Mysore University Main Library
621 PRA (Browse shelf (Opens below)) Not for loan T8993

Ph.D University of Mysore, Department of Studies in Electronics. 2016

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