Wellcome

Plasma etching processes for CMOS device realization / edited by Nicolas Posseme.

Contributor(s): Posseme, Nicolas [editor.]Material type: TextTextPublisher: London, UK : Kidlington, Oxford, UK : ISTE Press ; Elsevier, 2017Description: 1 online resource (x, 121 pages) : illustrationsContent type: text Media type: computer Carrier type: online resourceISBN: 9780081011966; 0081011962Subject(s): Plasma etching | Metal oxide semiconductors, Complementary | TECHNOLOGY & ENGINEERING -- Electronics -- Semiconductors | Metal oxide semiconductors, Complementary | Plasma etchingGenre/Form: Electronic books.Additional physical formats: Print version:: Plasma etching for CMOS devices realization.DDC classification: 621.3815/2 LOC classification: TA2020Online resources: ScienceDirect
Contents:
Front Cover; Plasma Etching Processes for CMOS Device Realization; Copyright; Contents; Preface; 1 CMOS Devices Through the Years; 1.1. Scaling law by Dennard; 1.2. CMOS device improvement through the years; 1.3. Summary; 1.4. What is coming next?; 1.5. Bibliography; 2 Plasma Etching in Microelectronics; 2.1. Overview of plasmas and plasma etch tools; 2.2. Plasma surface interactions during plasma etching; 2.3. Patterns transfer by plasma etching; 2.4. Conclusion; 2.5. Bibliography; 3 Patterning Challenges in Microelectronics; 3.1. Optical immersion lithography.
3.2. Next-generation lithography3.3. Coclusion; 3.4. Bibliography; 4 Plasma Etch Challenges for Gate Patterning; 4.1. pSi gate etching; 4.2. Metal gate etching; 4.3. Stopping on the gate oxide; 4.4. High-k dielectric etching; 4.5. Line width roughness transfer during gate patterning; 4.6. Chamber wall consideration after gate patterning; 4.7. Summary; 4.8. Bibliography; List of Acronyms; List of Authors; Index; Back Cover.
Item type:
Tags from this library: No tags from this library for this title. Log in to add tags.
Holdings
Item type Current library Call number Status Date due Barcode
Ebooks Ebooks Mysore University Main Library
Not for loan EBKELV721

Includes bibliographical references and index.

Online resource; title from PDF title page (ScienceDirect, viewed February 8, 2017).

Front Cover; Plasma Etching Processes for CMOS Device Realization; Copyright; Contents; Preface; 1 CMOS Devices Through the Years; 1.1. Scaling law by Dennard; 1.2. CMOS device improvement through the years; 1.3. Summary; 1.4. What is coming next?; 1.5. Bibliography; 2 Plasma Etching in Microelectronics; 2.1. Overview of plasmas and plasma etch tools; 2.2. Plasma surface interactions during plasma etching; 2.3. Patterns transfer by plasma etching; 2.4. Conclusion; 2.5. Bibliography; 3 Patterning Challenges in Microelectronics; 3.1. Optical immersion lithography.

3.2. Next-generation lithography3.3. Coclusion; 3.4. Bibliography; 4 Plasma Etch Challenges for Gate Patterning; 4.1. pSi gate etching; 4.2. Metal gate etching; 4.3. Stopping on the gate oxide; 4.4. High-k dielectric etching; 4.5. Line width roughness transfer during gate patterning; 4.6. Chamber wall consideration after gate patterning; 4.7. Summary; 4.8. Bibliography; List of Acronyms; List of Authors; Index; Back Cover.

There are no comments on this title.

to post a comment.

No. of hits (from 9th Mar 12) :

Powered by Koha